How to Decide on Your PCB Layer Ordering, Pouring and Stackup (with Rick Hartley)

What people said

Recommends Marmoz · 2021-03 · Electrical Engineering Stack Exchange · on “Trace impedance for two signal layers between ground planes”

When watching a few videos about stackup, EMI and impedance (especially this video from Fedevel Academy: [this video] ), I got confused how to compute trace impedance in the case of two signal layers between ground planes. Considering a stackup including at least 4 successive inner layers such as: L2: ground (GND) L3: Signal layer, it could have no copper pour (option A), ground pour (option B), power pour (option C). L4: Signal layer, it could have no copper pour (option A), ground pour (option B), power pour (option C). L5: ground (GND) The stackup is represented below. Some layers exist above L2 and below L5 but are considered out of the scope. Signal traces on L2 and L3 are orthogonal as show

Recommends 0x3333 · 2023-03 · Electrical Engineering Stack Exchange · on “Is it right to route AC L/N on different layers on a PCB?”

Just for the ones in the future, there are two nice videos about the routing, vias and return path: [LINK] and [this video]

Recommends Emile Cormier · 2023-12 · Electrical Engineering Stack Exchange · on “6-layer stack up: Optimal core/prepreg thinkness and coupling to GND”

Rick Hartley suggests the following 6-layer stack-up in this video [this video] : 1 ------Sig/Pwr------ 2 ------Ground------ (core) 3 ------Sig/Pwr------ 4 ------Ground------ (core) 5 ------Sig/Pwr------ 6 ------Ground------ The coupling is done in pairs which better matches the standard stack ups of the fabricators you mentioned. Highlights: Only 3 signal layers All the power pours are referencing ground All the signals are referencing ground Changing from layer 1 to layer 3 doesn't require a stitching via Changing from layer 3 to layer 5 doesn't require a stitching via Care is needed so that layer 5 signals are routed above layer 6 copper

Recommends Alirezaagha30 · 2024-03 · Electrical Engineering Stack Exchange · on “What is the best 4-layer stack-up for lowest EMI susceptivity?”

Extensive research has been conducted to determine the optimal number of board layers, their arrangement, and the thickness of each layer. In our investigation, we thoroughly examined Rick's training video, which offers valuable insights into this topic. You can access the educational video via this link: Rick's Training Video [this video] . Mr. Rick, a highly experienced professional with 45 years of expertise in hardware and PCB design, delves into the arrangement of different layers in the video. According to him, a four-layer board is considered to be at a normal level and is likely to pass the EMA test. However, for stronger boards, it is recommended to have six layers or more, as proven in

Recommends Confused · 2024-03 · Electrical Engineering Stack Exchange · on “What is the best 4-layer stack-up for lowest EMI susceptivity?”

There is no ideal stackup. Given below a good 4 layer stack up suggested by Rick Hartley. [LINK] To know more about stack up planning please refer this [this video] . There are some more good 4 layer stackup suggested by KENNETH WYATT . Please see below. [LINK] [LINK] Please refer this EDN article for more about the above stackups. [LINK]

Cites Confused · 2021-10 · Electrical Engineering Stack Exchange · on “Signal Integrity: rise time or signal frequency, which is more dangerous?”

I was watching the below video from Rick Hartley. In this he says more than signal frequency signal rise time is more problematic. A signal with rise time in the range of picoseconds and frequency in the range of kHz is more trouble maker (SI, EMI/EMC issues) compared to a signal with nanoseconds of rise time and frequency in the range of some MHz or GHz. May I know why and what makes signal rise time more problamatic compared to frequency? [this video]

Cites Confused · 2023-03 · Electrical Engineering Stack Exchange · on “Ten-layer PCB stackup power planes referencing each other”

I am learning about PCB stackup from this video [this video] . It describes a 10-layer stackup as shown below. Layer 5 and layer 6 are power planes. The author says to prevent power planes referencing each other, the dielectric thickness between layer 5 and 6 should be increased. My questions are: What will happen if power planes reference each other? What is meant by power planes referencing each other? Does it mean that the return current of one power plane will flow through the other power plane? If it does, what is the issue? [LINK]

Cites Confused · 2023-07 · Electrical Engineering Stack Exchange · on “Predicting EMI/EMC Issues from Microcontroller AC Spec Rise time fall time”

In one of his video [this video] Rick Hartley says signals with fast rise time can cause EMI/EMC issues. I am using FS32K148UJT0VLQT [LINK] in my design. In my board this controller is working at 5 V supply. Below image shows the AC electrical specifications at 5 V supply. This clearly shows the rise time and fall time of signals. Hope I am looking at correct spec, please correct me if I am wrong. May I know how I will decide whether the rise and fall time specifications given in the datasheet will cause any EMI-EMC issues or not? [LINK]

Cites Mark Hofmeister · 2025-04 · Electrical Engineering Stack Exchange · on “How does pouring power copper around signals in a signal layer affect impedance?”

I'm designing a PCB with a bunch of controlled-impedance differential pairs. I've determined that I must go to an 8-layer board. I'd like to use one of these Hartley-recommended stackups: [LINK] (Image Source: [this video] , 58:24) I've seen this recommended by many folks - pouring power on signal layers. To me, this starts to look like a coplanar waveguide rather than a microstrip or stripline above/below ground reference planes. However, I'm not sure if this is true, since the copper pour on the same layer isn't ground, it's power. How does pouring power around signals change the impedance that signals see? Is there any way to calculate/model it? I can't seem to find any calculators/resources o