"You must Unlearn what You have Learned"

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Recommends Christianidis Vasileios · 2021-03 · Electrical Engineering Stack Exchange · on “Two layer FR4 PCB: should you place GND pour on signal layer?”

Talking about two layer PCB's FR4 due to lower cost: I always poured ground on both layers of the PCB, I believed "the more the ground the better", but Recently I started watching altium live presentations, and I came across this video gem to 40:23, [this video] . In short, Eric Bogatin talks about pouring GND on signal layers, he says that this is bad (note that he talks about high speed signal lines PCBs). And he says it is not a good technique, because adding copper pour on signal layers makes the gap between traces conductive, and results in cross-talk (signal bouncing), and only if you add vias everywhere between tracks you will reduce dross talk. At the end he presents all the data in one g

Recommends JYelton · 2021-10 · Electrical Engineering Stack Exchange · on “General approach to routing with copper fill”

Ground between signals can help alleviate coupling, but only if it is well-stitched to the ground plane. If your choice is between an island of non-GND copper pour and no copper, you are better off with no copper. Eric Bogatin discusses this in greater detail at this time index of "You must unlearn what you have learned" Altium Academy video [this video] .

Recommends root · 2022-06 · Electrical Engineering Stack Exchange · on “How to know exact Decoupling Capacitor values for supply voltages?”

Using several capacitors with different capacitance values is an outdated recommendation that is not valid for surface-mounted capacitors. This is explained here: [this video] (Eric Bogatin's talk "You must Unlearn what You have Learned" at AltiumLive 2020). I wonder whether doing that is good though when not knowing which capacitance value is the best.

Cites Vaso · 2021-04 · Electrical Engineering Stack Exchange · on “PCB routing of parrallel capacitors with different values (Based on STM Nucleo64 dev board)”

I have been recently trying to understand how the STM32 ICs should be routed on PCB, in particular parallel capacitors of different values for power design. I have come across various suggestion about that it is legacy design [this video] , and that these capacitors should be replaced by only one because of anti-resonance [LINK] problem. So checking out the native design of STM dev board should provide insight of the right approach. Luckily everything is provided on STM website [LINK] . PCB files are from Altium Designer. Looking at design one interesting thing appeared evident when different capacitor values should be side by side. On schematics the 1uF is used in parallel with 100nF: [LINK] The

Cites Christianidis Vasileios · 2022-04 · Electrical Engineering Stack Exchange · on “Wierd noise on GND when I touch a metallic object to it”

Regarding the ESD discharge, you need to find out what frequencies the racket produces that interfere with your circuit. They most probably are low frequencies (for example up to ~300Mhz). To find this out use either a spectrum analyzer of the FFT function of your oscilloscope. You might face the same issues if you use a cheap room fan, turn it on and plug/unplug it on the AC mains fast and continuous. Cheap room fans are a classic device/case that interferes with surrounding electronics. Lower frequencies are easier to penetrate through metal and other objects, so they most likely causing you the issue. After you find out the frequencies that cause problems to your device, you might start s

Cites root · 2022-06 · Electrical Engineering Stack Exchange · on “How to know exact Decoupling Capacitor values for supply voltages?”

This seems not true for surface-mount capacitors. Explanation: [this video] (Eric Bogatin at AltiumLive 2020). Explanation that Application Notes are not to be trusted: [LINK] (Rick Hartley at AltiumLive 2019?). I wonder whether using different capacitors is good though when not knowing which capacitance value is the best.

Cites JYelton · 2023-02 · Electrical Engineering Stack Exchange · on “To pour, or not to pour? (And why?)”

The answer, as with many things, is: "it depends." Some reasons to create copper fills/planes: You need a reference plane (often ground, but can be a voltage supply) for signals on an adjacent layer. You need a low impedance voltage source , and/or delivery to multiple areas of a PCB, where a plane may offer advantages over routing traces. This seems most applicable to your specific case. You could use something like NEC EMIStream [LINK] (an Altium extension) to analyze power and current to determine if traces are adequate, but it's quite a bit of effort if you're new to it. Although I can't determine if you would benefit from a copper fill providing the voltage source, I would probably not

Cites JYelton · 2023-08 · Electrical Engineering Stack Exchange · on “Ground pour and stitching vias for long parallel tracks”

Your approach is probably good. Ideally you separate signal traces so that you reduce or eliminate crosstalk. Putting copper between the traces can negatively affect this, because it aids in crosstalk... unless you properly ground and stitch it with sufficient vias. In some designs, such as those containing high-speed data or RF signals >1GHz, the ground pour can be helpful as shielding, but then you should be thinking of transmission lines (microstrip/stripline, etc.) with via fencing. Eric Bogatin, in an Altium Academy video titled "You Must Unlearn What You Have Learned" [this video] , demonstrates how copper pours ( at this time index [this video] ) can adversely affect boards. To summarize: If yo